diff --git a/board/dave/PPChameleonEVB/Makefile b/board/dave/PPChameleonEVB/Makefile
new file mode 100644
index 0000000..39d2fec
--- /dev/null
+++ b/board/dave/PPChameleonEVB/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/dave/PPChameleonEVB/PPChameleonEVB.c b/board/dave/PPChameleonEVB/PPChameleonEVB.c
new file mode 100644
index 0000000..04b7cd7
--- /dev/null
+++ b/board/dave/PPChameleonEVB/PPChameleonEVB.c
@@ -0,0 +1,269 @@
+/*
+ * (C) Copyright 2001-2003
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+#include <malloc.h>
+
+/* ------------------------------------------------------------------------- */
+
+#if 0
+#define FPGA_DEBUG
+#endif
+
+/* fpga configuration data - gzip compressed and generated by bin2c */
+const unsigned char fpgadata[] =
+{
+#include "fpgadata.c"
+};
+
+/*
+ * include common fpga code (for esd boards)
+ */
+#include "../common/fpga.c"
+
+
+/* Prototypes */
+int gunzip(void *, int, unsigned char *, int *);
+
+
+int board_pre_init (void)
+{
+	out32(GPIO0_OR, CFG_NAND0_CE);                 /* set initial outputs     */
+        out32(GPIO0_OR, CFG_NAND1_CE);                 /* set initial outputs     */
+
+	/*
+	 * IRQ 0-15  405GP internally generated; active high; level sensitive
+	 * IRQ 16    405GP internally generated; active low; level sensitive
+	 * IRQ 17-24 RESERVED
+	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
+	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
+	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
+	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
+	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
+	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
+	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
+	 */
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+	mtdcr(uicer, 0x00000000);       /* disable all ints */
+	mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+	mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+	mtdcr(uictr, 0x10000000);       /* set int trigger levels */
+	mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
+	mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
+
+	/*
+	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
+	 */
+#if 1 /* test-only */
+	mtebc (epcr, 0xa8400000); /* ebc always driven */
+#else
+	mtebc (epcr, 0x28400000); /* ebc in high-z */
+#endif
+
+	return 0;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+int misc_init_f (void)
+{
+	return 0;  /* dummy implementation */
+}
+
+
+int misc_init_r (void)
+{
+#if 0 /* test-only */
+	DECLARE_GLOBAL_DATA_PTR;
+#if 0
+	volatile unsigned short *fpga_mode =
+		(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
+	volatile unsigned char *duart0_mcr =
+		(unsigned char *)((ulong)DUART0_BA + 4);
+	volatile unsigned char *duart1_mcr =
+		(unsigned char *)((ulong)DUART1_BA + 4);
+
+	bd_t *bd = gd->bd;
+	char *	tmp;                    /* Temporary char pointer      */
+	unsigned char *dst;
+	ulong len = sizeof(fpgadata);
+	int status;
+	int index;
+	int i;
+	unsigned long cntrl0Reg;
+
+	dst = malloc(CFG_FPGA_MAX_SIZE);
+	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, (int *)&len) != 0) {
+		printf ("GUNZIP ERROR - must RESET board to recover\n");
+		do_reset (NULL, 0, 0, NULL);
+	}
+
+	status = fpga_boot(dst, len);
+	if (status != 0) {
+		printf("\nFPGA: Booting failed ");
+		switch (status) {
+		case ERROR_FPGA_PRG_INIT_LOW:
+			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_INIT_HIGH:
+			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+			break;
+		case ERROR_FPGA_PRG_DONE:
+			printf("(Timeout: DONE not high after programming FPGA)\n ");
+			break;
+		}
+
+		/* display infos on fpgaimage */
+		index = 15;
+		for (i=0; i<4; i++) {
+			len = dst[index];
+			printf("FPGA: %s\n", &(dst[index+1]));
+			index += len+3;
+		}
+		putc ('\n');
+		/* delayed reboot */
+		for (i=20; i>0; i--) {
+			printf("Rebooting in %2d seconds \r",i);
+			for (index=0;index<1000;index++)
+				udelay(1000);
+		}
+		putc ('\n');
+		do_reset(NULL, 0, 0, NULL);
+	}
+
+	puts("FPGA:  ");
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i=0; i<4; i++) {
+		len = dst[index];
+		printf("%s ", &(dst[index+1]));
+		index += len+3;
+	}
+	putc ('\n');
+
+	free(dst);
+
+	/*
+	 * Reset FPGA via FPGA_DATA pin
+	 */
+	SET_FPGA(FPGA_PRG | FPGA_CLK);
+	udelay(1000); /* wait 1ms */
+	SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+	udelay(1000); /* wait 1ms */
+
+#endif
+
+#if 0
+	/*
+	 * Enable power on PS/2 interface
+	 */
+	*fpga_mode |= CFG_FPGA_CTRL_PS2_RESET;
+
+	/*
+	 * Enable interrupts in exar duart mcr[3]
+	 */
+	*duart0_mcr = 0x08;
+	*duart1_mcr = 0x08;
+#endif
+#endif
+
+	return (0);
+}
+
+
+/*
+ * Check Board Identity:
+ */
+
+int checkboard (void)
+{
+	unsigned char str[64];
+	int i = getenv_r ("serial#", str, sizeof(str));
+
+	puts ("Board: ");
+
+	if (i == -1) {
+		puts ("### No HW ID - assuming PPChameleonEVB");
+	} else {
+		puts(str);
+	}
+
+	putc ('\n');
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	unsigned long val;
+
+	mtdcr(memcfga, mem_mb0cf);
+	val = mfdcr(memcfgd);
+
+#if 0 /* test-only */
+	for (;;) {
+		NAND_DISABLE_CE(1);
+		udelay(100);
+		NAND_ENABLE_CE(1);
+		udelay(100);
+	}
+#endif
+#if 0
+	printf("\nmb0cf=%x\n", val); /* test-only */
+	printf("strap=%x\n", mfdcr(strap)); /* test-only */
+#endif
+
+	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+}
+
+/* ------------------------------------------------------------------------- */
+
+int testdram (void)
+{
+	/* TODO: XXX XXX XXX */
+	printf ("test: 16 MB - ok\n");
+
+	return (0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+extern void
+nand_probe(ulong physadr);
+
+void
+nand_init(void)
+{
+	printf("Probing at 0x%.8x\n", CFG_NAND0_BASE);
+	nand_probe(CFG_NAND0_BASE);
+	printf("Probing at 0x%.8x\n", CFG_NAND1_BASE);
+	nand_probe(CFG_NAND1_BASE);
+}
+#endif
diff --git a/board/dave/PPChameleonEVB/config.mk b/board/dave/PPChameleonEVB/config.mk
new file mode 100644
index 0000000..1bdf5e4
--- /dev/null
+++ b/board/dave/PPChameleonEVB/config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xFFFC0000
diff --git a/board/dave/PPChameleonEVB/flash.c b/board/dave/PPChameleonEVB/flash.c
new file mode 100644
index 0000000..110e021
--- /dev/null
+++ b/board/dave/PPChameleonEVB/flash.c
@@ -0,0 +1,105 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+/*
+ * include common flash code (for esd boards)
+ */
+#include "../common/flash.c"
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+#ifdef __DEBUG_START_FROM_SRAM__
+	return CFG_DUMMY_FLASH_SIZE;
+#else
+	unsigned long size_b0;
+	int i;
+        uint pbcr;
+        unsigned long base_b0;
+	int size_val = 0;
+
+	/* Init: no FLASHes known */
+	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here - FIXME XXX */
+
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
+
+	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+			size_b0, size_b0<<20);
+	}
+
+        /* Setup offsets */
+        flash_get_offsets (-size_b0, &flash_info[0]);
+
+        /* Re-do sizing to get full correct info */
+        mtdcr(ebccfga, pb0cr);
+        pbcr = mfdcr(ebccfgd);
+        mtdcr(ebccfga, pb0cr);
+        base_b0 = -size_b0;
+	switch (size_b0) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+        mtdcr(ebccfgd, pbcr);
+
+        /* Monitor protection ON by default */
+        (void)flash_protect(FLAG_PROTECT_SET,
+                            -CFG_MONITOR_LEN,
+                            0xffffffff,
+                            &flash_info[0]);
+
+        flash_info[0].size = size_b0;
+
+	return (size_b0);
+#endif
+}
diff --git a/board/dave/PPChameleonEVB/fpgadata.c b/board/dave/PPChameleonEVB/fpgadata.c
new file mode 100644
index 0000000..f5e30dd
--- /dev/null
+++ b/board/dave/PPChameleonEVB/fpgadata.c
@@ -0,0 +1,1139 @@
+  0x1f,0x8b,0x08,0x08,0x80,0xb0,0xc0,0x3e,0x00,0x03,0x61,0x73,0x68,0x34,0x30,0x35,
+  0x5f,0x31,0x5f,0x30,0x30,0x2e,0x62,0x69,0x74,0x00,0x94,0x9b,0x7f,0x70,0x14,0x65,
+  0x9a,0xc7,0x9f,0xe9,0xee,0x24,0x9d,0x99,0x4e,0xa6,0x0d,0x84,0x42,0xe5,0x47,0xe7,
+  0xc7,0xba,0xa3,0x37,0x0c,0x63,0x82,0x9a,0x05,0x32,0x69,0x03,0x7f,0xe4,0x84,0x2d,
+  0xd9,0xbd,0xba,0xaa,0xdb,0x5a,0x6b,0x1d,0x5d,0xbc,0xe2,0xb6,0xd0,0xca,0xea,0x55,
+  0x1d,0x67,0x6d,0xdd,0xbd,0x24,0x39,0x08,0x07,0x2b,0x01,0xb9,0x23,0xee,0x51,0x5c,
+  0xf3,0x63,0xcb,0xa8,0xa9,0xad,0x11,0x76,0x0d,0x0a,0xa5,0x4d,0x2e,0x8b,0x21,0x44,
+  0xc8,0xb1,0xd6,0x6e,0x44,0x97,0x1d,0x34,0xab,0x23,0x72,0x18,0xd1,0x92,0x44,0x20,
+  0xb9,0xf7,0xed,0xee,0xf7,0xed,0x9f,0x33,0xc9,0x8e,0x7f,0xf8,0xe4,0x9d,0xd7,0xf6,
+  0x7d,0x9e,0x79,0xfb,0x79,0x3e,0xfd,0x7d,0xde,0x86,0xd2,0xe8,0xb8,0xf9,0x0f,0x40,
+  0xe8,0x31,0x90,0x1f,0x7b,0x66,0xc3,0xb2,0xe4,0x7d,0x8f,0xde,0xfb,0x68,0x32,0x99,
+  0x78,0xea,0xc7,0xeb,0xe1,0x71,0x88,0xd4,0x3d,0x73,0x5f,0xf2,0x89,0x7f,0xfc,0xe9,
+  0xbd,0xcb,0x96,0xc1,0x8f,0xf1,0x5f,0xc9,0x64,0xfd,0xd2,0xe4,0x7d,0x4b,0xef,0xad,
+  0x87,0xf5,0x50,0x7a,0x6f,0x72,0xf9,0xb2,0x65,0xcb,0x97,0x35,0xc0,0x13,0x10,0xaa,
+  0x3f,0x3c,0x8d,0x3f,0x2f,0xbf,0xf0,0xb7,0x7f,0x9f,0x04,0x14,0x02,0x80,0x92,0x64,
+  0x28,0x4d,0xfe,0x1d,0x49,0x86,0x94,0x10,0xa0,0xa6,0x25,0x49,0xd0,0xc9,0xdf,0x60,
+  0x7d,0x5f,0x9a,0x04,0xc5,0xf9,0x77,0x28,0x09,0x2a,0xac,0x03,0x75,0x07,0x54,0x24,
+  0x61,0xe6,0x8f,0x2a,0x20,0x6a,0xfe,0x85,0xf3,0xa7,0x87,0x50,0xde,0x59,0xf6,0xa7,
+  0xe9,0x9a,0x46,0x4d,0x6e,0x16,0xd7,0x0f,0xa9,0xc0,0xae,0x7f,0x61,0x56,0xd7,0xff,
+  0x9a,0x5e,0xff,0x2f,0x9d,0x0f,0x15,0xb3,0x98,0x0e,0x20,0xb0,0xf5,0x58,0xf3,0x11,
+  0xc4,0x20,0x0c,0x1c,0x02,0x0d,0x14,0x6c,0x78,0xaf,0x3f,0x40,0xad,0x93,0x45,0x53,
+  0x70,0x03,0x35,0x65,0xa3,0xa3,0xfc,0x3c,0x38,0x87,0x9a,0x40,0x9a,0xe0,0x53,0x30,
+  0x4d,0x46,0x8e,0xf1,0x57,0x4d,0x63,0x82,0x1f,0x87,0x56,0x6b,0x7e,0xff,0xfc,0x5f,
+  0xc1,0x71,0x94,0xc8,0x46,0xba,0x9a,0x13,0xdc,0x76,0x94,0x80,0xb2,0x4c,0x38,0x61,
+  0x8e,0x1c,0xe3,0xae,0x52,0x23,0x2b,0xd0,0x28,0x0e,0x0a,0x3b,0xe0,0x28,0xc4,0xf5,
+  0x88,0x1c,0xae,0x85,0x76,0x88,0x83,0x98,0xe4,0x24,0x73,0x24,0xc9,0x0d,0x53,0xa3,
+  0x1f,0x2f,0xd2,0xfc,0xe8,0xd0,0x0b,0xc7,0x21,0xa1,0x47,0xba,0xfb,0x13,0xb0,0x1d,
+  0x12,0x70,0x7b,0x92,0x8b,0x9b,0x23,0x19,0xee,0x0a,0x35,0xc6,0x05,0xba,0x9e,0xef,
+  0x55,0x5e,0x81,0x1b,0x90,0xd2,0xa3,0xfb,0xf8,0xa5,0xca,0x19,0x58,0x19,0x93,0x32,
+  0x35,0x71,0x73,0x24,0xc3,0x5f,0xa1,0xc6,0xc8,0x6a,0x3a,0x5f,0x0b,0x9d,0x80,0x69,
+  0x68,0xd2,0xa3,0x23,0xfc,0x4d,0x62,0x24,0xa3,0xe3,0xa6,0xa1,0x3b,0x8d,0x1c,0xa4,
+  0xe9,0x7a,0xe4,0x5e,0x7a,0xfd,0x8d,0xf0,0x19,0xa4,0xa0,0xdc,0x71,0x59,0x66,0x8c,
+  0x0b,0x74,0xfd,0xa3,0x45,0x71,0xd9,0x5c,0xff,0x3d,0x12,0xbc,0x8f,0xd7,0xdf,0xf9,
+  0x1b,0x7b,0xd9,0xcc,0xb8,0x86,0x77,0xbf,0x75,0x7d,0x61,0xad,0x19,0x04,0xc4,0x7d,
+  0xb7,0xe3,0x10,0x17,0xd7,0xee,0x74,0x84,0x85,0x19,0x13,0xf8,0x5e,0x31,0x3f,0xe3,
+  0xf0,0x23,0xe8,0x43,0x4b,0xb2,0x91,0x1f,0x84,0x53,0xf2,0x5e,0xb4,0xf4,0xc3,0xd2,
+  0x4d,0xdc,0x45,0x73,0x04,0x1b,0xc8,0x32,0x46,0xd9,0xf5,0x5b,0xc4,0xb5,0xf0,0x25,
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+  0xfb,0x64,0xcd,0xd1,0x6f,0x5d,0x38,0x71,0xfe,0xdc,0xb2,0x07,0xd6,0x5c,0xe0,0x00,
+  0x3e,0x83,0xdc,0xfa,0x44,0xed,0x55,0xe9,0x15,0xb9,0x1d,0x9b,0x3a,0xcf,0x35,0x7e,
+  0xb7,0xfb,0x42,0xee,0xb7,0x7f,0x7b,0xeb,0x53,0x2b,0x1e,0x7c,0x73,0x45,0xee,0xf1,
+  0xf3,0x9d,0x17,0x56,0x5c,0xfd,0xe6,0x8a,0x33,0x8f,0x9f,0x97,0xeb,0x77,0x3e,0x70,
+  0xfb,0xd1,0x6f,0xbd,0x78,0xe2,0xdd,0x73,0x9d,0x4e,0x33,0xce,0x77,0xf2,0x86,0x9d,
+  0x78,0x1f,0xeb,0xdf,0x7e,0x94,0xb5,0x30,0x50,0x7f,0xe1,0xe5,0xfd,0x47,0x77,0xdc,
+  0x74,0xe2,0xd1,0x8d,0xcb,0xd8,0x1f,0x3e,0x8b,0x7f,0x88,0xe0,0xed,0xe6,0x17,0x47,
+  0xdf,0x3d,0xb7,0x30,0xc9,0xc1,0xa9,0xbf,0x0e,0x34,0xa8,0x75,0x8b,0xf9,0xa4,0x7e,
+  0xb5,0x9e,0x2d,0x28,0x08,0xe0,0x6a,0x5a,0x3b,0x09,0x5b,0xb1,0x64,0x4e,0xbc,0x76,
+  0x9f,0x82,0x20,0x73,0x35,0x25,0x72,0x7f,0x52,0x97,0x1f,0x8e,0x5e,0xe9,0xb0,0x41,
+  0xe4,0x87,0x30,0x64,0xce,0xe7,0xc0,0xe1,0x87,0x52,0xfd,0x62,0x7e,0xe8,0x01,0x5c,
+  0x91,0x19,0x51,0xe4,0xfc,0x30,0xd0,0x20,0xa4,0x6d,0x50,0x13,0xcb,0xd9,0x02,0x30,
+  0xda,0xb6,0x91,0x01,0x8d,0x6c,0x47,0x46,0xc4,0x4a,0x02,0xe3,0x59,0xeb,0xd9,0x46,
+  0xa2,0xc3,0xdd,0x0d,0xf6,0x58,0x4f,0x07,0x59,0x30,0xba,0xdc,0x88,0x1d,0xa0,0xdb,
+  0xc8,0x02,0x1b,0xc1,0xeb,0x74,0x5b,0x96,0x83,0x42,0xf0,0xf9,0x0e,0x3f,0xb4,0x0c,
+  0x48,0xea,0xec,0xf9,0xde,0x7f,0xc4,0x80,0xc1,0x81,0x2f,0x51,0xa4,0x85,0x38,0xad,
+  0x32,0x7c,0x7e,0x21,0x2d,0xb4,0xf4,0x1c,0xbd,0x6a,0x12,0xc1,0x16,0x7d,0x9c,0x5e,
+  0x45,0x6a,0xed,0xb4,0x19,0xd8,0xa3,0x7d,0x89,0xae,0xcc,0xce,0xcb,0xf7,0x8e,0xc1,
+  0x75,0xf4,0xae,0x6c,0xd3,0x44,0xcf,0xd3,0xb1,0x56,0x58,0x95,0x6d,0xca,0x23,0xb8,
+  0x0e,0x7f,0x42,0x30,0x2e,0xe9,0x4f,0xad,0xd0,0x08,0xcd,0x10,0x2f,0xa8,0x39,0x98,
+  0x8b,0x4a,0x2b,0x8e,0xdc,0x87,0xaf,0x36,0x58,0xb2,0xd4,0x07,0xa6,0xff,0x07,0xb8,
+  0x55,0xd5,0x71,0xb5,0xa7,0x5b,0x74,0x36,0x8b,0x70,0xd9,0x37,0x51,0xa5,0xf5,0xb2,
+  0xdd,0x6d,0x86,0xc4,0xf5,0x1e,0x64,0x8b,0x74,0x0b,0xf1,0xcc,0xe7,0xf8,0x7c,0xd3,
+  0xb1,0xbc,0x25,0xf9,0x06,0x53,0x17,0x76,0x3a,0xb6,0x25,0x35,0xc7,0xf4,0x56,0xaa,
+  0x65,0x15,0x56,0x22,0xd7,0x47,0xd2,0xcb,0x95,0x24,0x53,0xf4,0x49,0x48,0x63,0x6f,
+  0xd7,0xb0,0x92,0x7b,0x10,0xec,0x12,0x3f,0x5d,0x62,0x7b,0xf5,0x75,0x62,0x2a,0x16,
+  0x8c,0xc3,0x55,0x06,0xea,0x2c,0x0e,0xa0,0x76,0x0c,0x36,0x31,0xc0,0xae,0x32,0xb1,
+  0x9c,0xf6,0x57,0x19,0xb8,0x02,0xba,0x62,0x32,0x7e,0xc8,0x49,0x91,0x2e,0xf3,0xc3,
+  0x31,0x06,0x72,0x7b,0x97,0x88,0x92,0x9c,0xbf,0x9e,0xb2,0x37,0x2f,0xe1,0x87,0x66,
+  0x11,0x30,0x0b,0x9e,0x7d,0xde,0xc4,0xb7,0x4c,0x71,0x92,0xa6,0x0f,0x3b,0x00,0x5e,
+  0xa1,0x0e,0xd8,0x2b,0x4a,0xa2,0x92,0xfe,0x37,0x7b,0x4d,0xc1,0xdf,0xd8,0xd1,0x25,
+  0x02,0x40,0xfe,0x36,0xc2,0x7a,0xc0,0x60,0x44,0x4c,0xfc,0x44,0x91,0xbf,0x79,0xed,
+  0x21,0x12,0x3f,0xf4,0x40,0xaa,0xa8,0xc4,0x7f,0x7e,0x86,0xa4,0xc5,0x43,0x18,0x7b,
+  0x14,0x20,0xc6,0x5e,0xdc,0x01,0xa2,0xa4,0xa8,0x3d,0xf8,0x21,0xf1,0x8b,0x02,0x38,
+  0x20,0x86,0xdb,0x00,0x07,0xb8,0x3f,0xa5,0xbd,0xf6,0xf4,0xe3,0xb8,0xed,0xb2,0xe3,
+  0x96,0xca,0x06,0xf0,0x56,0x5b,0xb7,0x68,0x92,0xb0,0x92,0x20,0xf0,0x87,0x4f,0x3f,
+  0xb0,0x91,0xef,0xf1,0x5b,0x6f,0xaf,0x14,0x04,0x20,0xb5,0x67,0x03,0xb2,0x41,0xe4,
+  0x87,0x83,0xda,0x06,0x25,0x66,0xff,0xcc,0xe5,0x87,0x03,0x2e,0x10,0xfc,0xd0,0x5f,
+  0xdf,0x09,0xe3,0x6f,0x0b,0xac,0xe5,0x7a,0x6c,0xbf,0x00,0xc9,0xd8,0xfe,0x9a,0xbf,
+  0x22,0x08,0x32,0xb1,0x43,0x74,0x2b,0x59,0x60,0x2e,0x1f,0xbc,0x44,0x7a,0x5f,0xd2,
+  0x87,0xb4,0xf0,0x49,0xeb,0xea,0x24,0xd9,0xaf,0x08,0x50,0xbb,0x1f,0x5c,0xe0,0x94,
+  0x48,0xfa,0x27,0xd3,0xdb,0xa7,0xb6,0x73,0xda,0x09,0x12,0xff,0xbc,0xc1,0x66,0x8c,
+  0x31,0xf1,0xf3,0x84,0xa0,0x8e,0xfa,0x5e,0x69,0xfc,0x34,0x11,0x8b,0x69,0x1b,0xc6,
+  0x87,0x0d,0x7b,0x85,0xd0,0x3f,0x9b,0x78,0x89,0xab,0x88,0xfa,0xd5,0x82,0xd7,0x43,
+  0x26,0x0e,0xe0,0x8d,0x76,0xd2,0xaa,0x19,0xd7,0xbf,0x8b,0xe0,0x52,0xab,0x26,0x49,
+  0xb6,0xab,0xbc,0x04,0x81,0xf8,0x29,0x29,0xeb,0x9f,0x5e,0x8b,0xde,0xdf,0x32,0x17,
+  0x77,0x68,0x90,0x1f,0x5d,0x4a,0x2e,0x47,0x10,0x3b,0xb6,0xe8,0x7e,0x04,0xcb,0x11,
+  0x50,0x07,0x48,0xe3,0x99,0xac,0x45,0x36,0x88,0xfd,0x8f,0xed,0xc1,0xd1,0x72,0x09,
+  0x7e,0x08,0x9c,0x1d,0x9b,0x18,0x2d,0xec,0x27,0x3b,0x04,0x51,0xec,0x97,0xf4,0x0f,
+  0x8e,0x37,0x64,0x83,0x7c,0xfc,0x7c,0x83,0xb1,0xc1,0x7c,0x5f,0x80,0x1f,0x3a,0x40,
+  0xaa,0x8f,0xf3,0xcb,0xec,0x8a,0xeb,0xbd,0x38,0x5d,0x68,0x26,0xab,0x1b,0xbd,0x1a,
+  0x72,0x29,0x13,0x41,0x0f,0x02,0x2a,0x00,0x01,0xa9,0x7f,0x70,0xbe,0x14,0xe2,0x1d,
+  0xb8,0xf3,0xa8,0xc3,0x09,0x15,0x9f,0x20,0x51,0xd2,0x0d,0x99,0x42,0x3c,0xa5,0x22,
+  0x30,0x1c,0x60,0xfa,0xcf,0x47,0x65,0xa1,0xeb,0x9c,0x1f,0xda,0x66,0x2b,0xaa,0x1d,
+  0x82,0xfc,0xd0,0x74,0x89,0xa2,0x0b,0xe4,0xf1,0x93,0x6e,0x6d,0x62,0xfc,0x50,0x1b,
+  0x57,0x5a,0x91,0x93,0x75,0xb4,0x70,0x7e,0x38,0x06,0x86,0x51,0x37,0x86,0x25,0x79,
+  0xc6,0x0f,0xc7,0xa4,0xf6,0x10,0x57,0xff,0x24,0x85,0xfe,0xe9,0x73,0xf5,0x0f,0x03,
+  0x8b,0x70,0x9c,0x2b,0x4c,0xff,0x48,0xfd,0x63,0x72,0x25,0x53,0x63,0x8e,0xe5,0x50,
+  0x7b,0x3f,0x21,0xd4,0xce,0x16,0x6d,0x9c,0xa0,0x22,0xca,0x39,0x1a,0xa9,0x4b,0x9e,
+  0x5f,0x16,0x7e,0x26,0x54,0xb5,0xd8,0x26,0x1b,0x81,0x86,0x5b,0xeb,0x63,0x70,0xaf,
+  0x86,0x5f,0x70,0x38,0x77,0x6c,0xd1,0xd2,0xda,0xb9,0x0a,0x7e,0x41,0x7f,0xbe,0x67,
+  0x80,0xc0,0x57,0xac,0xb9,0x5b,0x22,0x2c,0x8c,0x54,0xca,0x8c,0xea,0x11,0x0a,0xaf,
+  0x22,0x31,0xe3,0x60,0x9f,0x21,0x4a,0x6c,0xa9,0x3d,0xc8,0xdf,0x96,0x98,0x0d,0x99,
+  0x48,0x26,0xb7,0x13,0xda,0xcd,0x06,0x33,0x32,0x00,0x3f,0xa3,0xed,0xfd,0xd1,0x4c,
+  0x24,0x0e,0xbf,0xc0,0x12,0x06,0xf4,0xbd,0x52,0x7b,0xba,0x29,0xee,0x46,0x53,0x7d,
+  0x49,0x40,0xb5,0x33,0x99,0x4c,0xf5,0x45,0x63,0x7f,0xef,0x82,0xc7,0x5d,0x20,0xeb,
+  0x1f,0x13,0xf9,0x61,0xb2,0xe0,0x1e,0x9e,0x54,0xb2,0x23,0xfa,0xfd,0xd3,0x8f,0xfc,
+  0x50,0x43,0x7e,0x68,0xdb,0x9b,0xee,0x66,0x44,0xd1,0x88,0x8d,0x53,0x87,0x16,0x7a,
+  0x40,0x1e,0x3f,0x66,0xaf,0x1a,0x4b,0xd4,0xf4,0x22,0x5d,0xee,0xc9,0xc4,0xe2,0xb4,
+  0x97,0xc4,0x4c,0x13,0xd5,0x0e,0x15,0xfa,0x87,0x95,0x00,0x31,0xa5,0xf1,0xa3,0x31,
+  0x96,0xea,0x6a,0x3e,0x7d,0x58,0xc5,0x61,0x60,0xe0,0x30,0x18,0x16,0x1b,0x07,0x3e,
+  0x1e,0xb2,0x20,0x09,0xa3,0x85,0x90,0x37,0x83,0xfc,0x90,0x83,0x1e,0xaf,0x44,0x1e,
+  0x3f,0xb7,0x2d,0x5c,0x67,0x8e,0x4e,0x6f,0x5c,0x32,0x7e,0x5b,0xcd,0x3a,0xf3,0xd0,
+  0xb4,0xb1,0xa4,0xe1,0x36,0xb2,0xce,0x1c,0x98,0xbe,0x01,0x41,0x84,0x95,0x20,0x90,
+  0xda,0x43,0xfa,0xe9,0xb6,0xae,0x05,0x39,0x5c,0xf4,0x7f,0xf2,0xb0,0x43,0x03,0x3c,
+  0x3e,0xc0,0x01,0x2c,0x37,0x24,0xfd,0x83,0xeb,0xb5,0xcf,0x0f,0x57,0xca,0xfc,0x70,
+  0x57,0x05,0x7e,0xd8,0xe9,0xf3,0xc3,0x35,0x32,0x3f,0x3c,0xf3,0x3b,0xe2,0x87,0x57,
+  0x32,0x5a,0xf8,0xcb,0xdc,0x85,0xf3,0x9d,0xe7,0x38,0x51,0x44,0x7e,0xf8,0x44,0x6d,
+  0x90,0x1f,0x9e,0x90,0xeb,0xf3,0xff,0xfd,0xc3,0x13,0x58,0xff,0x13,0x4e,0x14,0x91,
+  0x1f,0x3e,0x50,0xc4,0x0f,0x03,0xed,0x59,0xe6,0xf2,0xc3,0x85,0x97,0xdf,0x7e,0x74,
+  0x47,0x3b,0x23,0x96,0xf7,0x17,0xd5,0x3f,0xfe,0xe9,0x5b,0x9f,0x02,0x83,0xe0,0xfc,
+  0xc6,0x7f,0xbb,0xa3,0x9f,0xfe,0x29,0xa1,0x84,0x12,0x4a,0x28,0xa1,0x84,0x12,0x4a,
+  0x28,0xa1,0x84,0x12,0xca,0xef,0xbb,0xf0,0xbd,0x03,0x0d,0xf7,0x0e,0xa1,0x84,0x12,
+  0x4a,0x28,0xa1,0x84,0x12,0x4a,0x28,0xa1,0x84,0x12,0x4a,0x75,0xe1,0x7b,0x87,0x9a,
+  0x70,0xef,0x10,0x4a,0x28,0xa1,0x84,0x12,0x4a,0x28,0xa1,0x84,0x12,0x4a,0x28,0xa1,
+  0x54,0x17,0xbe,0x77,0xd0,0xf8,0xde,0xe1,0xff,0xba,0x29,0xa1,0x84,0x12,0x4a,0x28,
+  0xa1,0x84,0x12,0x4a,0x28,0xa1,0x84,0x12,0xca,0x17,0x28,0x29,0x16,0x72,0x19,0x5e,
+  0xf9,0x20,0x05,0x36,0xf3,0x62,0x8a,0xa4,0xc0,0xbc,0xe8,0xf3,0x04,0xe7,0x6f,0xd5,
+  0x14,0xe4,0x89,0xff,0xcc,0xe3,0x77,0x15,0xd7,0xfb,0x5f,0x2b,0x92,0xad,0x46,0xf1,
+  0x33,0x01,0x00,
diff --git a/board/dave/PPChameleonEVB/u-boot.lds b/board/dave/PPChameleonEVB/u-boot.lds
new file mode 100644
index 0000000..1ba6d17
--- /dev/null
+++ b/board/dave/PPChameleonEVB/u-boot.lds
@@ -0,0 +1,147 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  .resetvec 0xFFFFFFFC :
+  {
+    *(.resetvec)
+  } = 0xffff
+
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/ppc4xx/start.o	(.text)
+    cpu/ppc4xx/traps.o	(.text)
+    cpu/ppc4xx/interrupts.o	(.text)
+    cpu/ppc4xx/serial.o	(.text)
+    cpu/ppc4xx/cpu_init.o	(.text)
+    cpu/ppc4xx/speed.o	(.text)
+    cpu/ppc4xx/405gp_enet.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/crc32.o		(.text)
+    lib_ppc/extable.o	(.text)
+    lib_generic/zlib.o		(.text)
+
+/*    . = env_offset;*/
+/*    common/environment.o(.text)*/
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/board/dave/common/flash.c b/board/dave/common/flash.c
new file mode 100644
index 0000000..3cdbaa9
--- /dev/null
+++ b/board/dave/common/flash.c
@@ -0,0 +1,681 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+	short n;
+
+	/* set up sector start address table */
+        if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) {
+	    for (i = 0; i < info->sector_count; i++)
+		info->start[i] = base + (i * 0x00010000);
+        } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) {
+		/* set sector offsets for bottom boot block type	*/
+		for (i=0; i<8; ++i) {		/*  8 x 8k boot sectors	*/
+			info->start[i] = base;
+			base += 8 << 10;
+		}
+		while (i < info->sector_count) {	/* 64k regular sectors	*/
+			info->start[i] = base;
+			base += 64 << 10;
+			++i;
+		}
+        } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) {
+		/* set sector offsets for top boot block type		*/
+		base += info->size;
+		i = info->sector_count;
+		for (n=0; n<8; ++n) {		/*  8 x 8k boot sectors	*/
+			base -= 8 << 10;
+			--i;
+			info->start[i] = base;
+		}
+		while (i > 0) {			/* 64k regular sectors	*/
+			base -= 64 << 10;
+			--i;
+			info->start[i] = base;
+		}
+        } else {
+	    if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block type	*/
+		info->start[0] = base + 0x00000000;
+		info->start[1] = base + 0x00004000;
+		info->start[2] = base + 0x00006000;
+		info->start[3] = base + 0x00008000;
+		for (i = 4; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00030000;
+		}
+	    } else {
+		/* set sector offsets for top boot block type		*/
+		i = info->sector_count - 1;
+		info->start[i--] = base + info->size - 0x00004000;
+		info->start[i--] = base + info->size - 0x00006000;
+		info->start[i--] = base + info->size - 0x00008000;
+		for (; i >= 0; i--) {
+			info->start[i] = base + i * 0x00010000;
+		}
+	    }
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info  (flash_info_t *info)
+{
+	int i;
+        int k;
+        int size;
+        int erased;
+        volatile unsigned long *flash;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	case FLASH_MAN_STM:	printf ("ST  ");		break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM400B:	printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM400T:	printf ("AM29LV400T (4 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM800B:	printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM800T:	printf ("AM29LV800T (8 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM160B:	printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
+				break;
+	case FLASH_AM160T:	printf ("AM29LV160T (16 Mbit, top boot sector)\n");
+				break;
+	case FLASH_AM320T:	printf ("AM29LV320T (32 M, top sector)\n");
+				break;
+	case FLASH_AM320B:	printf ("AM29LV320B (32 M, bottom sector)\n");
+				break;
+	case FLASH_AMDL322T:	printf ("AM29DL322T (32 M, top sector)\n");
+				break;
+	case FLASH_AMDL322B:	printf ("AM29DL322B (32 M, bottom sector)\n");
+				break;
+	case FLASH_AMDL323T:	printf ("AM29DL323T (32 M, top sector)\n");
+				break;
+	case FLASH_AMDL323B:	printf ("AM29DL323B (32 M, bottom sector)\n");
+				break;
+	case FLASH_AM640U:	printf ("AM29LV640D (64 M, uniform sector)\n");
+				break;
+	case FLASH_SST800A:	printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
+				break;
+	case FLASH_SST160A:	printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
+				break;
+	case FLASH_STMW320DT:	printf ("M29W320DT (32 M, top sector)\n");
+				break;
+	default:		printf ("Unknown Chip Type\n");
+				break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i=0; i<info->sector_count; ++i) {
+#ifdef CFG_FLASH_EMPTY_INFO
+                /*
+                 * Check if whole sector is erased
+                 */
+                if (i != (info->sector_count-1))
+                  size = info->start[i+1] - info->start[i];
+                else
+                  size = info->start[0] + info->size - info->start[i];
+                erased = 1;
+                flash = (volatile unsigned long *)info->start[i];
+                size = size >> 2;        /* divide by 4 for longword access */
+                for (k=0; k<size; k++)
+                  {
+                    if (*flash++ != 0xffffffff)
+                      {
+                        erased = 0;
+                        break;
+                      }
+                  }
+
+		if ((i % 5) == 0)
+			printf ("\n   ");
+                /* print empty and read-only info */
+		printf (" %08lX%s%s",
+			info->start[i],
+			erased ? " E" : "  ",
+			info->protect[i] ? "RO " : "   ");
+#else
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+#endif
+
+	}
+	printf ("\n");
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (vu_long *addr, flash_info_t *info)
+{
+	short i;
+	short n;
+	CFG_FLASH_WORD_SIZE value;
+	ulong base = (ulong)addr;
+        volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)addr;
+
+	/* Write auto select command: read Manufacturer ID */
+	addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+	addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+	addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00900090;
+
+	value = addr2[CFG_FLASH_READ0];
+
+	switch (value) {
+	case (CFG_FLASH_WORD_SIZE)AMD_MANUFACT:
+		info->flash_id = FLASH_MAN_AMD;
+		break;
+	case (CFG_FLASH_WORD_SIZE)FUJ_MANUFACT:
+		info->flash_id = FLASH_MAN_FUJ;
+		break;
+	case (CFG_FLASH_WORD_SIZE)SST_MANUFACT:
+		info->flash_id = FLASH_MAN_SST;
+		break;
+	case (CFG_FLASH_WORD_SIZE)STM_MANUFACT:
+		info->flash_id = FLASH_MAN_STM;
+		break;
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* no or unknown flash	*/
+	}
+
+	value = addr2[CFG_FLASH_READ1];		/* device ID		*/
+
+	switch (value) {
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV400T:
+		info->flash_id += FLASH_AM400T;
+		info->sector_count = 11;
+		info->size = 0x00080000;
+		break;				/* => 0.5 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV400B:
+		info->flash_id += FLASH_AM400B;
+		info->sector_count = 11;
+		info->size = 0x00080000;
+		break;				/* => 0.5 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800T:
+		info->flash_id += FLASH_AM800T;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800B:
+		info->flash_id += FLASH_AM800B;
+		info->sector_count = 19;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV160T:
+		info->flash_id += FLASH_AM160T;
+		info->sector_count = 35;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV160B:
+		info->flash_id += FLASH_AM160B;
+		info->sector_count = 35;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)STM_ID_29W320DT:
+	        info->flash_id += FLASH_STMW320DT;
+	        info->sector_count = 67;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T:
+	        info->flash_id += FLASH_AM320T;
+	        info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B:
+	        info->flash_id += FLASH_AM320B;
+		info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322T:
+	        info->flash_id += FLASH_AMDL322T;
+	        info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322B:
+	        info->flash_id += FLASH_AMDL322B;
+		info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323T:
+	        info->flash_id += FLASH_AMDL323T;
+		info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323B:
+	        info->flash_id += FLASH_AMDL323B;
+		info->sector_count = 71;
+		info->size = 0x00400000;  break;	/* => 4 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)AMD_ID_LV640U:
+	        info->flash_id += FLASH_AM640U;
+		info->sector_count = 128;
+		info->size = 0x00800000;  break;	/* => 8 MB	*/
+
+	case (CFG_FLASH_WORD_SIZE)SST_ID_xF800A:
+		info->flash_id += FLASH_SST800A;
+		info->sector_count = 16;
+		info->size = 0x00100000;
+		break;				/* => 1 MB		*/
+
+	case (CFG_FLASH_WORD_SIZE)SST_ID_xF160A:
+		info->flash_id += FLASH_SST160A;
+		info->sector_count = 32;
+		info->size = 0x00200000;
+		break;				/* => 2 MB		*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		return (0);			/* => no or unknown flash */
+
+	}
+
+	/* set up sector start address table */
+        if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+	    ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) {
+	    for (i = 0; i < info->sector_count; i++)
+		info->start[i] = base + (i * 0x00010000);
+        } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) {
+		/* set sector offsets for bottom boot block type	*/
+		for (i=0; i<8; ++i) {		/*  8 x 8k boot sectors	*/
+			info->start[i] = base;
+			base += 8 << 10;
+		}
+		while (i < info->sector_count) {	/* 64k regular sectors	*/
+			info->start[i] = base;
+			base += 64 << 10;
+			++i;
+		}
+        } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
+		   ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) {
+		/* set sector offsets for top boot block type		*/
+		base += info->size;
+		i = info->sector_count;
+		for (n=0; n<8; ++n) {		/*  8 x 8k boot sectors	*/
+			base -= 8 << 10;
+			--i;
+			info->start[i] = base;
+		}
+		while (i > 0) {			/* 64k regular sectors	*/
+			base -= 64 << 10;
+			--i;
+			info->start[i] = base;
+		}
+        } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) {
+		/* set sector offsets for top boot block type		*/
+		base += info->size;
+		i = info->sector_count;
+                /*  1 x 16k boot sector */
+		base -= 16 << 10;
+                --i;
+		info->start[i] = base;
+		/*  2 x 8k  boot sectors */
+		for (n=0; n<2; ++n) {
+			base -= 8 << 10;
+			--i;
+			info->start[i] = base;
+		}
+                /*  1 x 32k boot sector */
+		base -= 32 << 10;
+                --i;
+		info->start[i] = base;
+
+		while (i > 0) {			/* 64k regular sectors	*/
+			base -= 64 << 10;
+			--i;
+			info->start[i] = base;
+		}
+        } else {
+	    if (info->flash_id & FLASH_BTYPE) {
+		/* set sector offsets for bottom boot block type	*/
+		info->start[0] = base + 0x00000000;
+		info->start[1] = base + 0x00004000;
+		info->start[2] = base + 0x00006000;
+		info->start[3] = base + 0x00008000;
+		for (i = 4; i < info->sector_count; i++) {
+			info->start[i] = base + (i * 0x00010000) - 0x00030000;
+		}
+	    } else {
+		/* set sector offsets for top boot block type		*/
+		i = info->sector_count - 1;
+		info->start[i--] = base + info->size - 0x00004000;
+		info->start[i--] = base + info->size - 0x00006000;
+		info->start[i--] = base + info->size - 0x00008000;
+		for (; i >= 0; i--) {
+			info->start[i] = base + i * 0x00010000;
+		}
+	    }
+	}
+
+	/* check for protected sectors */
+	for (i = 0; i < info->sector_count; i++) {
+		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
+		/* D0 = 1 if protected */
+		addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
+                if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
+                  info->protect[i] = 0;
+                else
+                  info->protect[i] = addr2[CFG_FLASH_READ2] & 1;
+	}
+
+	/*
+	 * Prevent writes to uninitialized FLASH.
+	 */
+	if (info->flash_id != FLASH_UNKNOWN) {
+		addr2 = (CFG_FLASH_WORD_SIZE *)info->start[0];
+		*addr2 = (CFG_FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+	}
+
+	return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *)(info->start[0]);
+	volatile CFG_FLASH_WORD_SIZE *addr2;
+	int flag, prot, sect, l_sect;
+	ulong start, now, last;
+        int i;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("Can't erase unknown flash type - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	l_sect = -1;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+		    addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[sect]);
+                    if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
+                        addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+                        addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+                        addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080;
+                        addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+                        addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+                        addr2[0] = (CFG_FLASH_WORD_SIZE)0x00500050;  /* block erase */
+                        for (i=0; i<50; i++)
+                          udelay(1000);  /* wait 1 ms */
+                    } else {
+                        if (sect == s_first) {
+                            addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+                            addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+                            addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080;
+                            addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+                            addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+                        }
+                        addr2[0] = (CFG_FLASH_WORD_SIZE)0x00300030;  /* sector erase */
+                    }
+		    l_sect = sect;
+		}
+	}
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	/* wait at least 80us - let's wait 1 ms */
+	udelay (1000);
+
+	/*
+	 * We wait for the last triggered sector
+	 */
+	if (l_sect < 0)
+		goto DONE;
+
+	start = get_timer (0);
+	last  = start;
+	addr = (CFG_FLASH_WORD_SIZE *)(info->start[l_sect]);
+	while ((addr[0] & (CFG_FLASH_WORD_SIZE)0x00800080) != (CFG_FLASH_WORD_SIZE)0x00800080) {
+		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+			printf ("Timeout\n");
+			return 1;
+		}
+		/* show that we're waiting */
+		if ((now - last) > 1000) {	/* every second */
+			putc ('.');
+			last = now;
+		}
+	}
+
+DONE:
+	/* reset to read mode */
+	addr = (CFG_FLASH_WORD_SIZE *)info->start[0];
+	addr[0] = (CFG_FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */
+
+	printf (" done\n");
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp, data;
+	int i, l, rc;
+
+	wp = (addr & ~3);	/* get lower word aligned address */
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i=0, cp=wp; i<l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+		for (; i<4 && cnt>0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt==0 && i<4; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *)cp);
+		}
+
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp += 4;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	while (cnt >= 4) {
+		data = 0;
+		for (i=0; i<4; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_word(info, wp, data)) != 0) {
+			return (rc);
+		}
+		wp  += 4;
+		cnt -= 4;
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i<4; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *)cp);
+	}
+
+	return (write_word(info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t *info, ulong dest, ulong data)
+{
+        volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[0]);
+        volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *)dest;
+        volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *)&data;
+	ulong start;
+	int flag;
+        int i;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*((volatile CFG_FLASH_WORD_SIZE *)dest) &
+             (CFG_FLASH_WORD_SIZE)data) != (CFG_FLASH_WORD_SIZE)data) {
+		return (2);
+	}
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+        for (i=0; i<4/sizeof(CFG_FLASH_WORD_SIZE); i++)
+          {
+            addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
+            addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
+            addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00A000A0;
+
+            dest2[i] = data2[i];
+
+            /* re-enable interrupts if necessary */
+            if (flag)
+              enable_interrupts();
+
+            /* data polling for D7 */
+            start = get_timer (0);
+            while ((dest2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) !=
+                   (data2[i] & (CFG_FLASH_WORD_SIZE)0x00800080)) {
+              if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+                return (1);
+              }
+            }
+          }
+
+	return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
diff --git a/board/dave/common/fpga.c b/board/dave/common/fpga.c
new file mode 100644
index 0000000..9547325
--- /dev/null
+++ b/board/dave/common/fpga.c
@@ -0,0 +1,256 @@
+/*
+ * (C) Copyright 2001-2003
+ * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <command.h>
+
+/* ------------------------------------------------------------------------- */
+
+#ifdef FPGA_DEBUG
+#define DBG(x...) printf(x)
+#else
+#define DBG(x...)
+#endif /* DEBUG */
+
+#define MAX_ONES               226
+
+#ifdef CFG_FPGA_PRG
+# define FPGA_PRG              CFG_FPGA_PRG /* FPGA program pin (ppc output)*/
+# define FPGA_CLK              CFG_FPGA_CLK /* FPGA clk pin (ppc output)    */
+# define FPGA_DATA             CFG_FPGA_DATA /* FPGA data pin (ppc output)  */
+# define FPGA_DONE             CFG_FPGA_DONE /* FPGA done pin (ppc input)   */
+# define FPGA_INIT             CFG_FPGA_INIT /* FPGA init pin (ppc input)   */
+#else
+# define FPGA_PRG              0x04000000  /* FPGA program pin (ppc output) */
+# define FPGA_CLK              0x02000000  /* FPGA clk pin (ppc output)     */
+# define FPGA_DATA             0x01000000  /* FPGA data pin (ppc output)    */
+# define FPGA_DONE             0x00800000  /* FPGA done pin (ppc input)     */
+# define FPGA_INIT             0x00400000  /* FPGA init pin (ppc input)     */
+#endif
+
+#define ERROR_FPGA_PRG_INIT_LOW  -1        /* Timeout after PRG* asserted   */
+#define ERROR_FPGA_PRG_INIT_HIGH -2        /* Timeout after PRG* deasserted */
+#define ERROR_FPGA_PRG_DONE      -3        /* Timeout after programming     */
+
+#define SET_FPGA(data)         out32(GPIO0_OR, data)
+
+#define FPGA_WRITE_1 {                                                    \
+        SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set clock to 0 */  \
+        SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set data to 1  */  \
+        SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);  /* set clock to 1 */  \
+        SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1  */
+
+#define FPGA_WRITE_0 {                                                    \
+        SET_FPGA(FPGA_PRG |            FPGA_DATA);  /* set clock to 0 */  \
+        SET_FPGA(FPGA_PRG);                         /* set data to 0  */  \
+        SET_FPGA(FPGA_PRG | FPGA_CLK);              /* set clock to 1 */  \
+        SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1  */
+
+#if 0
+static int fpga_boot (unsigned char *fpgadata, int size)
+{
+	int i, index, len;
+	int count;
+
+#ifdef CFG_FPGA_SPARTAN2
+	int j;
+#else
+	unsigned char b;
+	int bit;
+#endif
+
+	/* display infos on fpgaimage */
+	index = 15;
+	for (i = 0; i < 4; i++) {
+		len = fpgadata[index];
+		DBG ("FPGA: %s\n", &(fpgadata[index + 1]));
+		index += len + 3;
+	}
+
+#ifdef CFG_FPGA_SPARTAN2
+	/* search for preamble 0xFFFFFFFF */
+	while (1) {
+		if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff)
+		    && (fpgadata[index + 2] == 0xff)
+		    && (fpgadata[index + 3] == 0xff))
+			break;	/* preamble found */
+		else
+			index++;
+	}
+#else
+	/* search for preamble 0xFF2X */
+	for (index = 0; index < size - 1; index++) {
+		if ((fpgadata[index] == 0xff)
+		    && ((fpgadata[index + 1] & 0xf0) == 0x30))
+			break;
+	}
+	index += 2;
+#endif
+
+	DBG ("FPGA: configdata starts at position 0x%x\n", index);
+	DBG ("FPGA: length of fpga-data %d\n", size - index);
+
+	/*
+	 * Setup port pins for fpga programming
+	 */
+	out32 (GPIO0_ODR, 0x00000000);	/* no open drain pins */
+	out32 (GPIO0_TCR, in32 (GPIO0_TCR) | FPGA_PRG | FPGA_CLK | FPGA_DATA);	/* setup for output */
+	out32 (GPIO0_OR, in32 (GPIO0_OR) | FPGA_PRG | FPGA_CLK | FPGA_DATA);	/* set pins to high */
+
+	DBG ("%s, ",
+	     ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
+	DBG ("%s\n",
+	     ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
+
+	/*
+	 * Init fpga by asserting and deasserting PROGRAM*
+	 */
+	SET_FPGA (FPGA_CLK | FPGA_DATA);
+
+	/* Wait for FPGA init line low */
+	count = 0;
+	while (in32 (GPIO0_IR) & FPGA_INIT) {
+		udelay (1000);	/* wait 1ms */
+		/* Check for timeout - 100us max, so use 3ms */
+		if (count++ > 3) {
+			DBG ("FPGA: Booting failed!\n");
+			return ERROR_FPGA_PRG_INIT_LOW;
+		}
+	}
+
+	DBG ("%s, ",
+	     ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
+	DBG ("%s\n",
+	     ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
+
+	/* deassert PROGRAM* */
+	SET_FPGA (FPGA_PRG | FPGA_CLK | FPGA_DATA);
+
+	/* Wait for FPGA end of init period .  */
+	count = 0;
+	while (!(in32 (GPIO0_IR) & FPGA_INIT)) {
+		udelay (1000);	/* wait 1ms */
+		/* Check for timeout */
+		if (count++ > 3) {
+			DBG ("FPGA: Booting failed!\n");
+			return ERROR_FPGA_PRG_INIT_HIGH;
+		}
+	}
+
+	DBG ("%s, ",
+	     ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
+	DBG ("%s\n",
+	     ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
+
+	DBG ("write configuration data into fpga\n");
+	/* write configuration-data into fpga... */
+
+#ifdef CFG_FPGA_SPARTAN2
+	/*
+	 * Load uncompressed image into fpga
+	 */
+	for (i = index; i < size; i++) {
+		for (j = 0; j < 8; j++) {
+			if ((fpgadata[i] & 0x80) == 0x80) {
+				FPGA_WRITE_1;
+			} else {
+				FPGA_WRITE_0;
+			}
+			fpgadata[i] <<= 1;
+		}
+	}
+#else	/* ! CFG_FPGA_SPARTAN2 */
+	/* send 0xff 0x20 */
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_1;
+	FPGA_WRITE_0;
+	FPGA_WRITE_0;
+	FPGA_WRITE_1;
+	FPGA_WRITE_0;
+	FPGA_WRITE_0;
+	FPGA_WRITE_0;
+	FPGA_WRITE_0;
+	FPGA_WRITE_0;
+
+	/*
+	 ** Bit_DeCompression
+	 **   Code 1           .. maxOnes     : n                 '1's followed by '0'
+	 **        maxOnes + 1 .. maxOnes + 1 : n - 1             '1's no '0'
+	 **        maxOnes + 2 .. 254         : n - (maxOnes + 2) '0's followed by '1'
+	 **        255                        :                   '1'
+	 */
+
+	for (i = index; i < size; i++) {
+		b = fpgadata[i];
+		if ((b >= 1) && (b <= MAX_ONES)) {
+			for (bit = 0; bit < b; bit++) {
+				FPGA_WRITE_1;
+			}
+			FPGA_WRITE_0;
+		} else if (b == (MAX_ONES + 1)) {
+			for (bit = 1; bit < b; bit++) {
+				FPGA_WRITE_1;
+			}
+		} else if ((b >= (MAX_ONES + 2)) && (b <= 254)) {
+			for (bit = 0; bit < (b - (MAX_ONES + 2)); bit++) {
+				FPGA_WRITE_0;
+			}
+			FPGA_WRITE_1;
+		} else if (b == 255) {
+			FPGA_WRITE_1;
+		}
+	}
+#endif	/* CFG_FPGA_SPARTAN2 */
+
+	DBG ("%s, ",
+	     ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
+	DBG ("%s\n",
+	     ((in32 (GPIO0_IR) & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
+
+	/*
+	 * Check if fpga's DONE signal - correctly booted ?
+	 */
+
+	/* Wait for FPGA end of programming period .  */
+	count = 0;
+	while (!(in32 (GPIO0_IR) & FPGA_DONE)) {
+		udelay (1000);	/* wait 1ms */
+		/* Check for timeout */
+		if (count++ > 3) {
+			DBG ("FPGA: Booting failed!\n");
+			return ERROR_FPGA_PRG_DONE;
+		}
+	}
+
+	DBG ("FPGA: Booting successful!\n");
+	return 0;
+}
+#endif	/* 0 */
diff --git a/board/dave/common/pci.c b/board/dave/common/pci.c
new file mode 100644
index 0000000..f8f180c
--- /dev/null
+++ b/board/dave/common/pci.c
@@ -0,0 +1,202 @@
+/*
+ * (C) Copyright 2001
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+#include <pci.h>
+
+
+u_long pci9054_iobase;
+
+
+#define PCI_PRIMARY_CAR	(0x500000dc) /* PCI config address reg */
+#define PCI_PRIMARY_CDR	(0x80000000) /* PCI config data    reg */
+
+
+/*-----------------------------------------------------------------------------+
+|  Subroutine:  pci9054_read_config_dword
+|  Description: Read a PCI configuration register
+|  Inputs:
+|               hose            PCI Controller
+|               dev             PCI Bus+Device+Function number
+|               offset          Configuration register number
+|               value           Address of the configuration register value
+|  Return value:
+|               0               Successful
++-----------------------------------------------------------------------------*/
+int pci9054_read_config_dword(struct pci_controller *hose,
+			      pci_dev_t dev, int offset, u32* value)
+{
+  unsigned long      conAdrVal;
+  unsigned long      val;
+
+  /* generate coded value for CON_ADR register */
+  conAdrVal = dev | (offset & 0xfc) | 0x80000000;
+
+  /* Load the CON_ADR (CAR) value first, then read from CON_DATA (CDR) */
+  *(unsigned long *)PCI_PRIMARY_CAR = conAdrVal;
+
+  /* Note: *pResult comes back as -1 if machine check happened */
+  val = in32r(PCI_PRIMARY_CDR);
+
+  *value = (unsigned long) val;
+
+  out32r(PCI_PRIMARY_CAR, 0);
+
+  if ((*(unsigned long *)0x50000304) & 0x60000000)
+    {
+      /* clear pci master/target abort bits */
+      *(unsigned long *)0x50000304 = *(unsigned long *)0x50000304;
+    }
+
+  return 0;
+}
+
+/*-----------------------------------------------------------------------------+
+|  Subroutine:  pci9054_write_config_dword
+|  Description: Write a PCI configuration register.
+|  Inputs:
+|               hose            PCI Controller
+|               dev             PCI Bus+Device+Function number
+|               offset          Configuration register number
+|               Value           Configuration register value
+|  Return value:
+|               0               Successful
+| Updated for pass2 errata #6. Need to disable interrupts and clear the
+| PCICFGADR reg after writing the PCICFGDATA reg.
++-----------------------------------------------------------------------------*/
+int pci9054_write_config_dword(struct pci_controller *hose,
+			       pci_dev_t dev, int offset, u32 value)
+{
+  unsigned long      conAdrVal;
+
+  conAdrVal = dev | (offset & 0xfc) | 0x80000000;
+
+  *(unsigned long *)PCI_PRIMARY_CAR = conAdrVal;
+
+  out32r(PCI_PRIMARY_CDR, value);
+
+  out32r(PCI_PRIMARY_CAR, 0);
+
+  /* clear pci master/target abort bits */
+  *(unsigned long *)0x50000304 = *(unsigned long *)0x50000304;
+
+  return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+#ifdef CONFIG_DASA_SIM
+static void pci_dasa_sim_config_pci9054(struct pci_controller *hose, pci_dev_t dev,
+					struct pci_config_table *_)
+{
+  unsigned int iobase;
+  unsigned short status = 0;
+  unsigned char timer;
+
+  /*
+   * Configure PLX PCI9054
+   */
+  pci_read_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, &status);
+  status |= PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
+  pci_write_config_word(CFG_PCI9054_DEV_FN, PCI_COMMAND, status);
+
+  /* Check the latency timer for values >= 0x60.
+   */
+  pci_read_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, &timer);
+  if (timer < 0x60)
+    {
+      pci_write_config_byte(CFG_PCI9054_DEV_FN, PCI_LATENCY_TIMER, 0x60);
+    }
+
+  /* Set I/O base register.
+   */
+  pci_write_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, CFG_PCI9054_IOBASE);
+  pci_read_config_dword(CFG_PCI9054_DEV_FN, PCI_BASE_ADDRESS_0, &iobase);
+
+  pci9054_iobase = pci_mem_to_phys(CFG_PCI9054_DEV_FN, iobase & PCI_BASE_ADDRESS_MEM_MASK);
+
+  if (pci9054_iobase == 0xffffffff)
+    {
+      printf("Error: Can not set I/O base register.\n");
+      return;
+    }
+}
+#endif
+
+static struct pci_config_table pci9054_config_table[] = {
+#ifndef CONFIG_PCI_PNP
+  { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+    PCI_BUS(CFG_ETH_DEV_FN), PCI_DEV(CFG_ETH_DEV_FN), PCI_FUNC(CFG_ETH_DEV_FN),
+    pci_cfgfunc_config_device, { CFG_ETH_IOBASE,
+				 CFG_ETH_IOBASE,
+				 PCI_COMMAND_IO | PCI_COMMAND_MASTER }},
+#ifdef CONFIG_DASA_SIM
+  { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+    PCI_BUS(CFG_PCI9054_DEV_FN), PCI_DEV(CFG_PCI9054_DEV_FN), PCI_FUNC(CFG_PCI9054_DEV_FN),
+    pci_dasa_sim_config_pci9054 },
+#endif
+#endif
+  { }
+};
+
+static struct pci_controller pci9054_hose = {
+  config_table: pci9054_config_table,
+};
+
+void pci_init(void)
+{
+  struct pci_controller *hose = &pci9054_hose;
+
+  /*
+   * Register the hose
+   */
+  hose->first_busno = 0;
+  hose->last_busno = 0xff;
+
+  /* System memory space */
+  pci_set_region(hose->regions + 0,
+		 0x00000000, 0x00000000, 0x01000000,
+		 PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+  /* PCI Memory space */
+  pci_set_region(hose->regions + 1,
+		 0x00000000, 0xc0000000, 0x10000000,
+		 PCI_REGION_MEM);
+
+  pci_set_ops(hose,
+	      pci_hose_read_config_byte_via_dword,
+	      pci_hose_read_config_word_via_dword,
+	      pci9054_read_config_dword,
+	      pci_hose_write_config_byte_via_dword,
+	      pci_hose_write_config_word_via_dword,
+	      pci9054_write_config_dword);
+
+  hose->region_count = 2;
+
+  pci_register_hose(hose);
+
+  hose->last_busno = pci_hose_scan(hose);
+}